ECE 369A

Fundamentals of Computer Organization
Fall and spring
Required for CE; elective for EE
Catalog Data: 

ECE 369 - Fundamentals of Computer Organization (4 units)

Description: Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course qualitatively and quantitatively examines computer design trade-offs and teaches the fundamentals of computer architecture and organization, including CPU, memory, registers, arithmetic unit, control unit, and input/output components. Topics include reduced instruction set computer architectures (RISC), using the MIPS central processor as an example, interface between assembly and high-level programming constructs and hardware, instruction and memory cache systems, performance evaluation, benchmarks, and use of the SPIM/WinDLX/Verilog simulators for the MIPS architecture. For students who continue in computer architecture, it lays the foundation of the latest techniques implemented in current and future high-performance computing platforms. For students not continuing in computer architecture, it gives an overview of the techniques used in today's microprocessors.

Grading: Regular grades are awarded for this course: A B C D E

Course Fee: $25

ECE 175 and ECE 274A

Patterson, D.A., and J.L. Hennessy. Computer Organization and Design: The Hardware/Software Interface. 4th ed. Morgan Kaufmann Publishers, 2011.

Course Learning Outcomes: 

By the end of this course, the student will be able to:

  1. Understand the fundamentals of computer architecture
  2. Explore the computer architecture field on their own
  3. Articulate the design issues involved in computer architecture at theoretical and application levels
  4. Design and implement single-cycle and pipelined datapaths for a given instruction set architecture
  5. Evaluate the close relation between instruction set architecture design, datapath design, and algorithm design
  6. Understand the performance trade-offs involved in designing the memory subsystem, including cache, main memory and virtual memory
  7. Discuss the modern multicore architectures, such as the NVIDIA graphics processing unit
  8. Evaluate analytically the performance of a hypothetical architecture
Course Topics: 
  • Computer abstractions and technology (4 lectures)
  • Arithmetic for computers (4 lectures)
  • Instruction sets and software systems (7 lectures)
  • MIPS CPU and control unit organization (8 lectures)
  • Pipelining in MIPS CPU (6 lectures)
  • Exploiting memory hierarchy (6 lectures)
  • Storage and I/O (2 lectures)
  • Multicores, multiprocessors and clusters (4 lectures)
Class/Laboratory Schedule: 

Three 50-minute lectures per week
Two 75-minute lab sessions per week

Relationship to Student Outcomes: 

ECE 369A contributes directly to the following specific electrical and computer engineering student outcomes of the ECE department:

  • Ability to apply knowledge of mathematics, science and engineering (medium)
  • Ability to design and conduct experiments, as well as to analyze and interpret data (high)
  • Ability to design a system, component or process to meet desired needs within realistic constraints, such as economic, environmental, social, political, ethical, health and safety, manufacturability and sustainability (high)
  • Ability to identify, formulate and solve engineering problems (high)
  • Ability to communicate effectively (medium)
  • Recognition of the need for, and an ability to engage in, life-long learning (low)
  • Knowledge of contemporary issues (medium)
  • Ability to use the techniques, skills and modern engineering tools necessary for engineering practice (high)
Prepared by: 
Ali Akoglu
Prepared Date: 

University of Arizona College of Engineering