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Research Interests
My broad research interest is in the field of reconfigurable computing with a primary focus on application specific architecture design space for compute intensive applications.

Active Research Areas:
• Reconfigurable Computing,
• Performance Modeling,
• Scientific Computing

Motivation
I believe that next several years will be very exciting and interesting for us in the academy. On one hand high throughput technologies have led to an exponential growth in the amount of data generated over the past several years. This data explosion is forcing scientists to search for innovative computational designs to meet the growing demand in the fields of geophysics, biosciences, signal processing, multimedia processing, etc.. On the other hand, cost of technology advances in deep submicron technology is more and more expensive. Increased DC power due to the leakage current and AC power due to the higher clock frequency have made very deep submicron technology designs become very expensive. Today it is not profitable anymore to invest money on increasing the CPU frequency or tweaking hardware configuration.

Computational fluid dynamics, biochemical algorithms, molecular modeling are compute intensive application domains. Super computers with PC or workstation based clusters with million dollar contracts are being employed to respond to the computation demand. However cluster based approach suffers from diminishing return on investment as clusters grow larger and they suffer from the headroom problem, meaning that by the end of the design cycle you have a parallel system composed of previous generation's processors competing against current faster processors. Companies employ such clusters for drug discovery process, however if application specific domain is my target, why employ general purpose processors in my cluster which leads to very low resource utilization. Why not exploit the computation characteristics and design processors tailored to the needs of the application.

 

There is evidence that reconfigurable systems can deliver 10x to 100x improvement in computational efficiency for these compute intensive applications. Significant speedup advantage is due to highly parallel nature of FPGA. Fortunately many problems in those applications are inherently parallel and benefit from concurrent computing models. Reconfigurable processors can potentially contribute to important value metrics by reducing design cycle time, porting costs and power consumption compared to general purpose processors and application specific programmable processors.

Is everything good about FPGAS? Answer is no, because FPGAs suffer from the drawback of being application agnostic, hence incur penalties of loss of clock cycles in redundant reconfigurations, generic routing, and poor memory architectures., which impact speed , power and area.

So there is a need to design application specific reconfigurable systems tailored to the computation characteristics of the target application. That way resulting special purpose chips can make ultimate use of available circuitry to run a specific algorithm. In that sense there is a need for a methodology to derive such architectures. All these factors have led us into application specific reconfigurable architecture design space with the following objectives:
• Allocating just enough switching and wiring resources through the use of commutation profiling as opposed to generic routing in FPGAs.
• Seamless algorithm design at high level language, without the need for the hardware assembly languages such as VHDL.
• Exploit inherent parallelism at function level instead of program level,

Here is a research summary that might give you some pointers.

Interested in joining my "Reconfigurable Computing" research group?

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This site was last updated 04/26/08