ECE 274: Digital Logic

Catalog Data: Digital Logic (3) I, II Number systems and coding, logic design, sequential systems, register transfer language.

Textbooks: R.H.Katz, Contemporary Logical Design, Benjamin Cummings, 1994; LogicWorks 4: Interactive Circuit Design Software, Capilano Computing Systems, 1998.

Instructor: Dr. François E. Cellier, Professor of ECE.

Prerequisites by topic:

  1. Basic mathematical knowledge (algebra)
  2. Basic physical knowledge (energy conservation)
  3. Basic electrical engineering knowledge (voltage, current, power)

Method of Assessing Student Knowledge of Prerequisite Topics:

The first homework shall contain questions about the prerequisite material as applicable to the concepts to be learnt in class.

Goals:

Overall Educational Goals:

The course offers an introductory exposition of the principles and techniques underlying the design and development of computer systems. It introduces Boolean algebra as a means to describing binary logical functions, then proceeds to show the implementation of such functions in digital logic.

Specific Instructional Goals:

  1. Be able to express logical statements in mathematical language.
  2. Be able to translate mathematical logic statements between the different commonly used representations: Boolean algebra, Venn diagram, truth table, and gate-level representation.
  3. Analyze and design ideal combinational logic circuits at switch level, gate level, and chip level.
  4. Analyze non-ideal combinational logic circuits, including hazards, fan-in and fan-out problems, time delays.
  5. Two-level and multi-level design of combinational circuits.
  6. Number representation, and basic components of computer circuitry.
  7. Analyze and design sequential logic circuits.

Course Topics:

  1. Boolean Algebra: Formal introduction into Boolean Algebra. The duality principle. Fundamental theorems of Boolean algebra. Set theory and Boolean algebra. Venn diagrams. (4 classes)

  2. Two-Level Combinational Logic: Introduction to logical gates and their realization in hardware. Mapping Boolean functions to circuits consisting of logic gates. Tow-level logic canonical forms. Karnaugh maps. Boolean minimization. (4 classes)

  3. Multilevel Combinational Logic: CAD tools for multilevel logic design, gate delays. timing wafeforms, hazards and their elimination. (3 classes)

  4. Programmable and Steering Logic: Programmable arrays, switch and steering logic, multiplexers/selectors, decoders/demultiplexers, read-only memories. (3 classes)

  5. Number Systems and Codes: Number systems other than decimal, in particular binary and hexadecimal number systems. Conversion between bases. Arithmetic with bases other than 10. Representations of negative numbers. Coding, error detection and correction. (3 classes)

  6. Arithmetic Circuits: Networks of binary addition: half and full adders, carry lookahead, arithmetic logic units, BCD adders, multiplier circuits. (3 classes)

  7. Sequential Logic: Feedback loops in gate logic circuits, bistable circuits, the concept of states, state transition tables. (3 classes)

  8. Components of Sequential Systems: Flip-flops: R-S latches, J-K flip-flops, D flip-flops, T flip-flops. Design of circuits using flip-flops. Cascaded flip-flops. Asynchronous circuits. (3 classes)

  9. Sequential Logic Circuits: Registers and counters, selfstarting counters, asynchronous versus synchronous counters, random-access memory circuits. (3 classes)

  10. Finite State Machines: The concept of a state machine, finite state machine design, Moore and Mealy machines. (3 classes)

  11. Hardware Description Languages: Introduction to VHDL. (3 classes)

  12. Finite State Machine Optimization: State minimization, state assignment, finite state machine partitioning. (3 classes)

  13. Finite State Machine Implementation: Finite state machine implementation with programmable logic. ROM versus PLA design, design with counters, advanced programmable logic devices. (2 classes)

Class Requirements:

  1. Three lecture sessions per week.
  2. Weekly homework assignments.
  3. Three class examinations (midterms) and a final examination.

Computer Usage: LogicWorks 4.0 will be used in homework problems.

Laboratory Projects: Six laboratory projects will be offered.

Assessment of Course Goals: Through examinations.

Contribution to Professional Component:

    Mathematics or Basic Science:      0 credits
    Engineering Science or Design:     4 credits
    General Educational Requirements:  0 credits
    Major Design Experience:           0 credits
  
Contribution to Program Objectives:

Develop an appropriate level of mastery of basic principles of digital circuits.


Midterms:

I shall offer 3 midterms, of which I shall count the best 2. Midterms are graded over the curve. No makeup midterms shall be offered, since I cannot grade exams taken by only one or two students over the curve. Midterms in ECE 274 are closed book exams. Students are allowed one sheet of notes (letter size, double-sided) during the 1st midterm, two sheets during the 2nd midterm, three sheets during the 3rd midterm, and four sheets during the final exam. The final exam must be taken by all students.


Laboratory:

I shall offer 6 laboratory exercises. Students are expected to participate in at least five of the six. Each laboratory exercise takes place in a preassigned week of the semester. Limited makeup opportunities shall be provided. If you can't make one of the laboratory sessions, please, let your laboratory assistant know in the week before the laboratory takes place. The laboratory assistants will try to accommodate you as best they can, but all laboratory sessions are quite full this year.

Participation in a laboratory exercise consists of the following components:

The laboratory component of ECE 274 is very important. Hence failure to participate in the required number of laboratory exercises shall result in a failing grade in the class.


Homeworks:

I shall offer n homeworks out of which I expect n-2 to be handed in for full credit.


Withdrawals and Incompletes:

Students will be allowed to withdraw from ECE 274 with a grade of W until two days after the first midterm is returned. Thereafter, until the last day to drop classes as indicated in the Schedule of Classes, only students who are currently in the top 75% of the class will be allowed to drop. Incompletes will only be granted in emergency situations.


Grading Policy:

  Homework:           10%
  Laboratory:         30%
  Midterms:           30% (15% each)
  Final Examination:  30%