`timescale 1 ns/1 ns

module LaserTimer_1P(B, X, Clk, Rst);
    
   input B;
   output reg X;
   input Clk, Rst;
 
   parameter S_Off = 0, S_On1 = 1,
             S_On2 = 2, S_On3 = 3;
             
   reg [1:0] State;
   
   // CombLogic
   always @(posedge Clk, posedge Rst) begin
	
      if ( Rst == 1 ) begin
         State <= S_Off;
         X <= 0;
      end
		
		case (State) 
         S_Off: begin
            X <= 0;
            if (B == 0) 
               State <= S_Off;
            else
               State <= S_On1;
         end

         S_On1: begin
            X <= 1;
            State <= S_On2;
         end
			
         S_On2: begin
            X <= 1;
            State <= S_On3;
         end
			
         S_On3: begin
            X <= 1;
            State <= S_Off;
         end
			
      endcase
   end
endmodule