Application-Specific FPGAs
The inclusion of field programmable gate arrays (FPGAs) within a system-on-a-chip (SOC) design offers programmability, flexibility, and reconfigurability not possible with application specific integrated circuits (ASIC) or full-custom implementations. However, these benefits come at the expense of significant area, performance, and power consumption overheads compared to ASIC or full-custom circuits. As a typical SOC design will require fabrication of the final integrated circuit, rather than rely on a generic FPGA architecture, an FPGA integrated within an SOC design can be optimized for the specific intended application. We are currently investigating design space exploration methodologies for generating application specific FPGAs (ASFPGAs) by tailoring several FPGA architectural features for a specific hardware circuit to improve the area, delay, or energy consumption compared to traditional FPGA designs and reduce the overheads of utilizing an FPGA compared to ASIC and full custom implementations. Our preliminary efforts have demonstrated that an ASFPGA optimized for a particular design metric provides a 70% improvement in area, energy, or delay compared to a generic FPGA architecture, with a minimum and maximum improvement of 20% and 99% for specific hardware circuits.
Publications
- M. Hammerquist, R. Lysecky. Design Space Exploration for Application-Specific FPGAs in System-on-a-Chip Designs. IEEE International SOC Conference (SOCC), pp. 279-282, 2008.
