| PhD, Electrical/Computer Engineering
California Institute of Technology - Pasadena, CA |
June 1993 | |
| MS, Electrical/Computer
Engineering
Georgia Institute of Technology - Atlanta, GA |
June 1989 | |
| BS, Electrical/Computer
Engineering
Louisiana State University - Baton Rouge, LA |
June 1987 | |
| Queen Mary College University of London, England LSU Study Abroad Program |
Jan.-July 1986 |
| Associate Professor, University of Arizona | August 2005-present | ||
| Assistant Professor, University of Arizona Department of Electrical and Computer Engineering, ARL Division of Neurobiology |
July 1999-July 2005 | ||
| My laboratory conducts research in the area of neuromorphic vision and robotic systems: applying a knowledge of neurobiology to design analog and mixed-signal VLSI systems with the goal of inexpensive, agile, highly capable autonomous robotics. A focus is in the area of visual motion and depth perception systems. | |||
| Postdoctoral Research Fellow, Caltech
Advisor: Christof Koch |
March 1996-July 1999 | ||
| Designed neuromorphic analog VLSI chips for visual motion processing. Extended earlier one-dimensional velocity sensor designs to two dimensions, producing real-time optical flow chips. Used asynchronous interchip communication to build multi-chip motion processors. The dual goals of this research were developing biologically-inspired solutions to vision problems of engineering interest, and using VLSI as a high-speed biological modeling substrate. | |||
| Research Assistant, Caltech Doctoral Dissertation: Classification and Approximation with Rule-Based Networks Advisor: Rodney M. Goodman |
Sept. 1989-Sept. 1993 | ||
| The goal of this research was to integrate a rule-based knowledge representation with the parallelism and layered structure of artificial neural networks to achieve a learning system which operated with the speed and simplicity of a neural network, but the conclusions of which could be explained in terms of conjunctive rules. This philosophy was applied to the discrete classification problem and, employing fuzzy logic, to the function approximation problem. The function approximation system was used to learn a complete fuzzy controller for a nonlinear control system. | |||
| Research Assistant, Georgia Tech Master's Research: A Load-Adaptive Scheduler for Hard Real-Time Multiprocessor Operating Systems Advisor: Karsten Schwan |
Jan. 1989-Sept. 1990 | ||
| This research extended a existing operating system scheduler for hard real-time multiprocessor systems to obtain improved high-load performance by allowing the scheduler to choose between several code modules (with varying runtimes) for each periodic task. A new scheduling algorithm was developed to choose the most desirable code module for each task, as available time allowed. A mini operating-system program was developed to verify the effectiveness of the new scheduler. | |||
| Consultant, Computational Sensors Corporation Santa Barbara, CA |
1999-2001 | ||
| Provide technical advice, simulations, and expertise in the area of spatiotemporal frequency based visual motion algorithms for application to missile defense. | |||
| Staff Member, MIT Lincoln Laboratory Lexington, MA |
Sept. 1993-March 1996 | ||
| Analyzed radar data collected with the Airborne Seeker Testbed, a highly instrumented airborne radar platform which takes the part of a missile in simulated combat encounters. Specialized in super-resolution algorithms. Designed, coded, developed, and flight-tested a real-time processor for the testbed. | |||
| Programming Consultant Pasadena, CA (with partner R. M. Goodman) |
Jan. 1992-June 1993 | ||
| Designed, coded, developed and maintained rule-based software to provide a trader with real-time buy/sell suggestions for the S&P 500 index. Trading autonomously via a satellite link, the system made a consistent (but small) profit. | |||
| Technical Staff Member IBM Cambridge Scientific Center Cambridge, MA |
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| Developed simulation code for a message-passing parallel computer system including a low-level hardware simulation and a high-level operational simulation; provided graphical display of operation via X-Windows; participated in demonstrations of parallel computer hardware. | June-Sept. 1990 | ||
| Designed digital hardware for VLSI implementation of a message-passing parallel computer routing algorithm; digital design was done in a hierarchical CAD program and tested with Xilinx FPGA chips. | June-Sept. 1989 | ||
| Participated in the design of a new highly adaptive and fault-tolerant routing system for a message-passing parallel computer. A US patent was awarded for this work. | June-Sept. 1988 | ||
| Designed digital hardware for a high-speed interface card to link the new IBM PS/2 with an IBM 370 architecture mainframe. | June-Sept. 1987 | ||