The following are a few examples of our completed projects designed in our lab. For more information, please feel free to contact our lab director, Dr. Dongsheng Ma by email: dma@email.arizona.edu.
Our mailing address is: ECE355, ECE Building, 1230 E Speedway Blvd, Tucson, AZ 85721, USA.
A Low-Ripple Fast-Response CMOS Integrated Switching Buck Converter with Dual-Mode Pulse-Train/PWM Control
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Description: A Low-Ripple Fast-Response CMOS Integrated Switching Buck Converter with Dual-Mode Pulse-Train/PWM Control
Designer: Feng Luo;
Process: 0.35um Standard Digital CMOS;
Year of fabrication: 2007;
Disclosure: IEEE 39thPower Electronics Specialists Conference, Jun. 2008 |
Adaptive Step-Down Switched-Capacitor Power Converter with z-Domain Observation-Based Line-Load Regulation
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Description: Adaptive Step-Down Switched-Capacitor Power Converter with z-Domain Observation-Based Line-Load Regulation
Designer: Inshad Chowdhury, Minkyu Song;
Process: 0.35um Standard Digital CMOS;
Year of fabrication: 2007;
Disclosure: IEEE VLSI Symp. on Circuits ( VLSI ) , Hawaii, USA, June 2008 |
IC with On-Chip Capacitors
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Designer: Ling Su;
Process: 0.35um Standard Digital CMOS;
Year of fabrication: 2007; |
IC Controller
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Designer: Feng Luo;
Process: 0.35um Standard Digital CMOS;
Year of fabrication: 2006; |
CMOS Low-Power CMFB-Free Variable-Gain Current-Feedback Amplifier
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Description: CMOS Low-Power CMFB-Free Variable-Gain Current-Feedback Amplifier; Designer: Hio Chao (MS Graduate, now with Analog Devices Inc.);
Process: 0.35um Standard Digital CMOS;
Year of fabrication: 2006;
Disclosure: IEEE Asia Solid-State Circuits Conference, Nov. 2006. |
CMOS Switching Converter with SC-Based One-Cycle Controller and On-Chip Filtering Capacitor
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Description: CMOS Switching Converter with SC-Based One-Cycle Controller and On-Chip Filtering Capacitor;
Process: 0.35um Standard Digital CMOS;
Year of fabrication: 2006;
Disclosure: 30th European Solid-State Circuits Conference, Sept. 2006. |
CMOS Switched-Capacitor DC-DC Converter with Analog Interleaving Regulation Scheme
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Description: CMOS Switched-Capacitor DC-DC Converter with Analog Interleaving Regulation Scheme;
Designer: Mohankumar N. S. (MS graduate; now with Texas Instruments);
Process: 0.35um Standard Digital CMOS;
Year of fabrication: 2006;
Disclosure: IEEE Custom Integrated Circuits Conference, Sept. 2006. |
A Family of Sub-1V Low-Noise Bandgap Voltage References
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Description: A Family of Sub-1V Low-Noise Bandgap Voltage References;
Designer: Keith Sanborn (MS candidate);
Process: 0.5um BiCMOS 50HP407;
Year of fabrication: 2006;
Disclosure: IEEE Custom Integrated Circuits Conference, Sept. 2006. |
50M SPS Current Mode Analog Hypertrellis Decoder for wireless communication
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Description: 50M SPS Current Mode Analog Hypertrellis Decoder for wireless communication;
Process: 0.5um CMOS N-well 1-poly 3-metal;
Year of fabrication: 2004; |
Temperature-Adaptive power supply for on-chip thermal management
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Description: Temperature-Adaptive power supply for on-chip thermal management;
Designer: C. Zhang (Ph. D student, now with Micron Tech);
Process: 1.5um CMOS N-well 1-poly 2-metal;
Year of fabrication: 2004;
Disclosure: US Patent No. US60/657,342. |
Fast response adapative power supply system with dual loop ECLs
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Description: Fast response adapative power supply system with dual loop ECLs;
Process: 0.5um CMOS N-well 1-poly 3-metal;
Year of fabrication: 2003;
Disclosure: IEEE Journal of Solid-State Circuit, Jan. 2004;
IEEE/ACM ASP-DAC Best Design Award (Jan. 2004). |
SIMO DC-DC switching converter with Freewheel switching control in PCCM
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Description: SIMO DC-DC switching converter with Freewheel switching control in PCCM;
Process: 0.5um CMOS N-well 1-poly 3-metal;
Year of fabrication: 2002;
Disclosure: IEEE Journal of Solid-State Circuit, Jan. 2003; IEEE VLSI Symp. on Circuits, 2001. |
Single-inductor dual-output DC-DC switching converter with TM control in DCM
Description: Single-inductor dual-output DC-DC switching converter with TM control in DCM;
Process: 0.5um CMOS N-well 1-poly 3-metal;
Year of fabrication: 2000;
Disclosure: IEEE Journal of Solid-State Circuit, Jan. 2003; IEEE VLSI Symp. on Circuits, 2001. |
1 GHz CMOS Up- and down-Conversion Mixers
Description: 1 GHz CMOS Up- and down-Conversion Mixers;
Process: 0.5um CMOS N-well 1-poly 3-metal;
Year of fabrication: 1999;
Disclosure: Journal of Analog Integrated Circuits & Signal Processing, Aug. 2000. |
