Roman Lysecky, Assistant Professor
Department of Electrical and Computer Engineering
University of Arizona
Tucson, AZ 85721
Office: ECE 356F, 520-621-6192, Fax: 520-621-3862
rlysecky@ece.arizona.edu
Bio
Roman Lysecky received a B.S., M.S., and Ph.D. degrees in computer science from the University of California, Riverside in 1999, 2000, and 2005, respectively. His primary research interests focus on embedded systems design, with emphasis on dynamic adaptability, hardware/software partitioning, hardware observability, field programmable gates arrays (FPGAs), and low-power methodologies.
Research Lab
Visit the Embedded Systems Design Lab's website for more information about ongoing research projects.
News
| Jul 08, 2008: | Check out this month's issue of IEEE Computer for an interesting article on Warp Processing: Dynamic Translation of Binaries to FPGA Circuits. |
| Jun 13, 2008: | Paper on Design Space Exploration for Application-Specific FPGAs in System-on-a-Chip Designs co-authored with my student, Mark Hammerquist, has been accepted to the IEEE System on a Chip Conference (SOCC), 2008. |
| Jun 11, 2008: | Paper on Hardware/Software Partitioning of Floating Point Software Applications to Fixed-Pointed Coprocessor Circuits co-authored with my student, Lance Saldanha, has been accepted to International Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS). See you in Atlanta. |
| Jun 09, 2008: | Paper on Non-Intrusive Dynamic Application Profiler for Detailed Loop Execution Characterization co-authored with my student, Ajay Nair (now with Western Digital), has been accepted to the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES). |
| May 23, 2008: | I recently received an award for Excellence at the Student Interface from the College of Engineering. |
| Apr 01, 2008: | Toyota ITC is funding a new project on "Warp Processing Technology for Self Healing Vehicle Electronic Circuit Applications" |
