.Susan.Lysecky

Conference

  1. eBlocks - Embedded Systems Building Blocks to Enable Project-Based Learning
    Anu Phalke, Susan Lysecky
    Workshop on Embedded Systems Education (WESE08)

  2. A First Step Towards Dynamic Profiling of Sensor-Based Systems
    S. Sridharan, S. Lysecky
    Sensor and Ad Hoc Communications and Networks (SECON), June 2008.

  3. Automated Generation of Basic Custom Sensor-Based Embedded Computing Systems Guided by End-User Optimization Criteria.
    S. Lysecky, F. Vahid.
    International Conference on Ubiquitous Computing (UbiComp), September 2006.

  4. Automated Application-Specific Tuning of Parameterized Sensor-Based Embedded System Building Blocks.
    S. Lysecky, F. Vahid.
    International Conference on Ubiquitous Computing (UbiComp), September 2006.

  5. Usability of State Based Boolean eBlocks.    ppt
    S. Cotterell and Frank Vahid.
    International Conference on Human-Computer Interaction (HCII), July 2005.

  6. eBlocks - An Enabling Technology for Basic Sensor Based Systems.    ppt
    S. Cotterell, R. Mannion, F. Vahid, H. Hsieh.
    IPSN Track on Sensor Platform, Tools and Desing Methods for Networked Embedded Systems (SPOTS) April 2005.

  7. A Logic Block Enabling Logic Configuration by Non-Experts in Sensor Networks.    ppt
    S. Cotterell and Frank Vahid.
    Conference on Human Factors in Computing Systems (CHI), April 2005.

  8. System Synthesis for Networks of Programmable Blocks    ppt
    R. Mannion, H. Hsieh, S. Cotterell, F. Vahid
    Design, Automation and Test in Europe (DATE), March 2005.

  9. Applications and Experiments with eBlocks - Electronic Blocks for Basic Sensor-Based Systems    ppt
    S. Cotterell, K. Downey, F. Vahid
    Sensor and Ad Hoc Communications and Networks (SECON), October 2004.

  10. First Results with eBlocks: Embedded Systems Building Blocks    ppt    poster
    S. Cotterell, F. Vahid, W. Najjar, H. Hsieh
    CODES+ISSS Merged Conference, October 2003.

  11. Synthesis of Customized Loop Caches For Core-Based Embedded Systems    ppt
    S. Cotterell and F. Vahid
    International Conference on Computer Aided Design (ICCAD), November 2002.

  12. Tuning of Loop Cache Architectures to Programs in Embedded System Design    ppt    poster
    S. Cotterell and F. Vahid
    International Symopsium on System Synthesis (ISSS), October 2002.

  13. A Fast On-Chip Profiler Memory
    R. Lysecky, S. Cotterell, and F. Vahid
    Design Automation Conference (DAC), June 2002.

Journal

  1. Enabling Non-Expert Construction of Basic Sensor-Based Systems.
    S. Lysecky, F. Vahid.
    To appear - Transactions on Computer-Human Interaction (TOCHI).

  2. A Fast On-Chip Profiler Memory using a Pipelined Binary Tree
    R. Lysecky, S. Cotterell, F. Vahid.
    IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 12, Num. 1, pp. 120-122, January 2004.

  3. Tiny Instruction Caches For Low Power Embedded Systems
    A. Gordon-Ross, S. Cotterell, and F. Vahid
    ACM Transactions on Embedded Computing Systems (TECS), Vol. 2, Issue 4, pp. 449-481, November 2003.

  4. Power Estimator Development for Embedded System Memory Tuning     (draft version)
    F. Vahid, T. Givargis, and S. Cotterell
    Journal of Circuits, Systems and Computers (JCSC), Vol. 11, No. 5, October 2002.

  5. Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example
    A. Gordon-Ross, S. Cotterell, and F. Vahid
    IEEE Computer Architecture Letters (CAL), Vol. 1, Jan. 2002.

Technical Report

  1. A Logic Block Enabling Logic Configuration by Non-Experts in Sensor Networks.
    S. Cotterell and Frank Vahid.
    UC Riverside Technical Report UCR-CSE-04-09, 2004.

  2. Loop Analysis of Embedded Applications.
    J. Villarreal, R. Lysecky, S. Cotterell, F. Vahid.
    UC Riverside Technical Report UCR-CSE-01-03, 2001.

Other

  1. Customization of Loop Caches For Embedded Systems Design.
    S. Cotterell.
    Master Thesis, Department of Computer Science and Engineering, University of California, Riverside, August 2003.