// Module inverter
// Author  : Srinivasan Ramasubramanian
// Function: Inverts 5 binary inputs: x0 through x4.
// Output  : x0comp through x4comp -- the inverted inputs.
//         : b2, b1, b0  -- three bits that encodes the # of 1s in the input.

module inverter5bit(x0, x1, x2, x3, x4, x0comp, x1comp, x2comp, x3comp, x4comp, b0, b1, b2);
input x0, x1, x2, x3, x4;
output x0comp, x1comp, x2comp, x3comp, x4comp;
output b0, b1, b2;

wire m0, m1, m2, m3, m4, m5;
wire c01, c02, c03, c04;
wire c11, c12, c13, c14;
wire c21, c22, c23, c24;
wire c31, c32, c33, c34;
wire c41, c42, c43, c44;
wire v0, v1, v2, v3, v4, v5;
wire b0, b1, b2, b0comp, b1comp, b2comp;


assign m1 = x0 | x1 | x2 | x3 | x4;

assign m2 = (x0 & x1) | (x0 & x2) | (x0 & x3) | (x0 & x4) | 
                 (x1 & x2) | (x1 & x3) | (x1 & x4) |
                             (x2 & x3) | (x2 & x4) |
                                         (x3 & x4) ;

// Use the same terms from m2; but use the missing terms
// that way it's easy to see that the combinations are correct.
assign m3 = (x2 & x3 & x4) | (x1 & x3 & x4) | (x1 & x2 & x4) | (x1 & x2 & x3) |
                      (x0 & x3 & x4) | (x0 & x2 & x4) | (x0 & x2 & x3) |
                                       (x0 & x1 & x4) | (x0 & x1 & x3) |
                                                        (x0 & x1 & x2) ;


assign m4 = (x1 & x2 & x3 & x4) | (x0 & x2 & x3 & x4) |
     (x0 & x1 & x3 & x4) | (x0 & x1 & x2 & x4) | (x0 & x1 & x2 & x3);


assign m5 = (x0 & x1 & x2 & x3 & x4);




// Computing bis ->  The bits in the encoded binary value for the # of 1s
// If you use only three inputs, then we need only b2 and b1.
// In this case, b2 and b1 correspond to R and S used in the solution
// by Hadar.

assign b2 = m4; 

assign b2comp = ~b2;

assign b1 = (b2comp & m2);  
//  (b2 & m6) --m6 is obviously 0 as we have only 5 inputs

assign b1comp = ~b1;

assign b0 = (b2 & b1comp & m5) | (b2comp & b1 & m3) | (b2comp & b1comp & m1);  
// (b1 & b2 & m7) = 0; 

assign b0comp = ~b0;



// Computing Vi - indicating if there are i ones or not.

assign v0 = b2comp & b1comp & b0comp; 
assign v1 = b2comp & b1comp & b0;
assign v2 = b2comp & b1 & b0comp;
assign v3 = b2comp & b1 & b0; 
assign v4 = b2 & b1comp & b0comp;
assign v5 = b2 & b1comp & b0;




// Computing C0s and x0comp;
// without using x0, find all combinations.
assign c01 = x1 | x2 | x3 | x4;
assign c02 = (x1 & x2) | (x1 & x3) | (x1 & x4) |
                  (x2 & x3) | (x2 & x4) |
                              (x3 & x4) ;
assign c03 = (x2 & x3 & x4) | (x1 & x3 & x4) | (x1 & x2 & x4) | (x1 & x2 & x3);
assign c04 = (x1 & x2 & x3 & x4);


assign x0comp = v0 | (v1 & c01) | (v2 & c02) | (v3 & c03) | (v4 & c04);



// Computing C1s and x1comp
assign c11 = x2 | x3 | x4 | x0;
assign c12 = (x2 & x3) | (x2 & x4) | (x2 & x0) |
                  (x3 & x4) | (x3 & x0) |
                              (x4 & x0) ;
assign c13 = (x3 & x4 & x0) | (x2 & x4 & x0) | (x2 & x3 & x0) | (x2 & x3 & x4);
assign c14 = (x2 & x3 & x4 & x0);


assign x1comp = v0 | (v1 & c11) | (v2 & c12) | (v3 & c13) | (v4 & c14);



// Computing C2s and x2comp
assign c21 = x3 | x4 | x0 | x1;
assign c22 = (x3 & x4) | (x3 & x0) | (x3 & x1) |
                  (x4 & x0) | (x4 & x1) |
                              (x0 & x1) ;
assign c23 = (x4 & x0 & x1) | (x3 & x0 & x1) | (x3 & x4 & x1) | (x3 & x4 & x0);
assign c24 = (x3 & x4 & x0 & x1);


assign x2comp = v0 | (v1 & c21) | (v2 & c22) | (v3 & c23) | (v4 & c24);



// Computing C3s and x3comp
assign c31 = x4 | x0 | x1 | x2;
assign c32 = (x4 & x0) | (x4 & x1) | (x4 & x2) |
                  (x0 & x1) | (x0 & x2) |
                              (x1 & x2) ;
assign c33 = (x0 & x1 & x2) | (x4 & x1 & x2) | (x4 & x0 & x2) | (x4 & x0 & x1);
assign c34 = (x4 & x0 & x1 & x2);


assign x3comp = v0 | (v1 & c31) | (v2 & c32) | (v3 & c33) | (v4 & c34);



// Computing C4s and x4 comp
assign c41 = x0 | x1 | x2 | x3;
assign c42 = (x0 & x1) | (x0 & x2) | (x0 & x3) |
                  (x1 & x2) | (x1 & x3) |
                              (x2 & x3) ;
assign c43 = (x1 & x2 & x3) | (x0 & x2 & x3) | (x0 & x1 & x3) | (x0 & x1 & x2);
assign c44 = (x0 & x1 & x2 & x3);


assign x4comp = v0 | (v1 & c41) | (v2 & c42) | (v3 & c43) | (v4 & c44);


endmodule